300mm Power-SOI substrates from Soitec S.A. - new push into AI data center and EV power chips

Reviewed: ad hoc news Bestseller & Flagship desk. Edited and checked on 2026-06-29, 08:27. Details in the imprint.

300mm Power-SOI substrates from Soitec S.A. do not gleam like a finished smartphone, but as the wafers slide over the line in Bernin, engineers know these silent discs will sit deep inside power chips for AI servers and electric cars. You almost hear the faint hum of vacuum robots placing them with millimeter precision.

What Soitec actually ships

Soitec calls its family of engineered wafers for power management "Power-SOI" - silicon-on-insulator substrates optimized for high-voltage and mixed-signal chips. In the latest generation they are supplied on 300mm diameter wafers, the same size mainstream logic fabs use, to enable higher throughput and lower cost per die for customers designing BCD-on-SOI processes for power management ICs and motor drivers.

Under the surface, literally, is Soitec's Smart Cut process: a thin active silicon layer, a buried oxide that electrically isolates it, and a handle wafer underneath. That multi-layer structure lets chipmakers draw crisp isolation trenches and high-voltage devices while keeping leakage low and switching losses controlled.

Why 300mm matters for power

Until recently many power IC lines still ran on 200mm wafers, especially for automotive and industrial chips where qualification cycles are long. Moving Power-SOI to 300mm means a foundry can process roughly twice the die area per wafer, often in more modern fabs with tighter process control and more automation, which matters as power-management IC volumes for AI data centers and EV platforms climb sharply.

In practice that means a DC-DC converter controller or a gate driver for an EV inverter that used to be a cost bottleneck on a mature 200mm line can now be fabbed with more dies per run, while keeping the isolation and robustness designers expect from SOI. For an automotive-grade part built into an inverter or an onboard charger, that can shave pennies on the bill of materials without compromising thermal behavior.

Targeting AI racks and EV inverters

Soitec's latest announcement around these 300mm Power-SOI substrates is a partnership with Chinese specialty foundry ZenSemi to scale BCD-on-SOI production for next-generation power electronics in AI data centers, EVs, humanoid robots and industrial drives. In that deal Soitec supplies the wafers, and ZenSemi ramps the process technology on its 300mm line for high-volume customers.

Stand inside a modern data center and you feel the warm air pouring from racks of GPUs and accelerators. Each rack needs dense, efficient power stages to feed hundreds of amps at low voltage into boards; Power-SOI based controllers and gate drivers help manage that flow while handling transients and keeping losses controlled.

What designers get from Power-SOI

For chip designers, the value in Power-SOI is the combination of high-voltage devices and precise analog control blocks on the same die. BCD-on-SOI means bipolar transistors, CMOS logic and DMOS power devices coexisting on that engineered wafer, with the buried oxide helping to isolate hot nodes and reduce parasitic capacitances that usually slow switching.

So when a team at an automotive Tier-1 supplier sketches a new 48-volt to 12-volt converter, they can place the high-side and low-side FET drivers, protection circuits and microcontroller-like state machine on one die. The SOI structure helps them manage creepage distances and withstand high dV/dt events from motor windings or battery noise.

CEO focus and human faces

Soitec CEO Pierre Barnabé has repeatedly framed power and automotive as key growth vectors alongside the established RF-SOI smartphone business. In internal presentations and earnings calls he points to engineered substrates for EV, industrial and AI power management as a way to smooth cycles tied to handset demand.

On the ground, people like a process engineer named Julie in Bernin feel that shift in a very tactile way. Instead of only tuning wafers for smartphone RF front-ends, her team now spends days adjusting oxide thickness and surface roughness so that a future car's power module runs cooler in a summer traffic jam.

How this fits Soitec's portfolio

Power-SOI sits next to RF-SOI, FD-SOI and SmartSiC in Soitec's line-up of engineered wafers. RF-SOI serves front-end modules in phones and Wi-Fi gear, FD-SOI underpins low-power microcontrollers and edge processors, and SmartSiC targets high-voltage traction inverters. Power-SOI is the bridge between logic and full wide-bandgap, covering DC-DC converters, motor drivers and industrial control.

For investors that matters because it diversifies the revenue mix. Instead of being tied mainly to smartphone cycles, Soitec sells wafers into long-lived automotive platforms and industrial drives, where design wins can last a decade and pricing is steadier, even if qualification takes longer and requirements are stricter.

Stock context for Soitec

Soitec, headquartered in Bernin near Grenoble, is listed on Euronext Paris and is known to German investors through trading on European venues. For those watching the equity, the focus is how fast power and automotive substrates like 300mm Power-SOI ramp relative to the mature RF-SOI smartphone business, because that mix will influence margin stability and cyclicality of Soitec shares over the next years.

This article was AI-assisted and editorially reviewed. Product information without guarantee; prices and availability may change at short notice. No investment advice, no buy or sell recommendation. Stock-market transactions involve risks up to total loss.